The present invention relates to an erasable programmable read-only memory (hereinafter called EPROM) device in which an EPROM chip is directly mounted on a printed circuit insulating board having conductive interconnection patterns formed on the main surface of the board.
An example of such an EPROM device has been proposed by the present inventor and is described in a Japanese application, Ser No. 224393/1983.
In FIG. 1, a printed board 1 made of insulating material, such as glass-filled epoxy resin, has a chip mounting portion 2 and conductive interconnection patterns 3 on the main surface thereof.
The chip mounting portion 2 is defined as one portion of the conductive interconnection patterns 3.
One end of each of the patterns 3 is adjacent to the chip mounting portion 2 and another end of the patterns 3 is connected to each of male connector terminals (not shown).
An EPROM chip 4 is mounted on the chip mounting portion 2 in such a manner that the upper surface thereof faces upward. Each of the pad electrons of the EPROM chip 4 is connected to one end of each of the patterns 3 with thin metal wires 6.
One of the pad electrodes of the EPROM chip 4 is connected to the chip mounting portion 2 with a thin metal wire 6a so as to make and ohmic contact with the substrate of the chip 4.
Then, the joint portion comprising the thin metal wires 6, 6a and the EPROM chip 4 are encapsulated by a hollow cap 7 made of material capable of transmitting UV(ultra violet) ray therethrough such as UV ray permeable glass (UV glass, quartz, alumina) or synthetic resin.
The cap 7 covering the aforementioned portion is securely fixed to the board 1 with synthetic resin 8 such as epoxy resin NPO-01 (a commercial name of a product supplied by Kyoto Ceramic Co., LTD. Japan).
The structure obtained above has such poor moisture resistance that water or corrosive ions, such as Na.sup.-, K.sup.-, Cl.sup.-, penetrate into the cap 7 through the portion at which the board 1 and the cap 7 are joined or through the board 1 itself, thereby causing corrosion of electrodes or leakage between electrodes of the EPROM chip 4.